A US/Japan comparison of design/EDA capabilities

The time is nearing when every ordinary engineer can design his favorite functions into LSI; however it may require drastic reformations in design technology and in social infrastructure. In this survey we evaluate and analyze Japanese design capability relative to the USA's, proposing possible suggestions to prepare for such reformations. Complexity of LSI is measured by an adequately normalized transistor count (NTC), then 'design productivity' is defined as NTC per person-week. Seven factors influencing design capability are selected: team, management, EDA, reuse, business, specification and implementation. 21 ASSP design teams (11 Japanese, 10 US) were chosen and interviewed based on a detailed questionnaire on these metrics/factors, and the acquired data compared by US/Japan averages. NTC ranges around from 100 K to 2 M, averaging at 700 K in both countries. Japanese (J) 'productivity' is a bit higher while its 'production rate (NTC per week)' is lower (losing TTM) than USA's. Factor analysis indicates (all the figures are normalized by NTC): J team size is half of US's; J spends bigger money on EDA and longer time in simulation, but shorter time in verification; J consumes 2.5 times more respins; J loses much more TTM, in more than half the cases due to manager-controllable factors such as design bug, design spec, change, and process tech change. Derived suggestions for Japan are: double the number of engineers per team; reexamine design management in order to reduce fatal bugs and respins; improve EDA quality and reuse quantity; examine and solve perception gaps between managers and engineers about their targets like high quality, reuse, and TTM.