{"title":"低损耗杂化硅锥","authors":"P. Pintus, M. Heck, G. Kurczveil, J. Bowers","doi":"10.1109/GROUP4.2011.6053715","DOIUrl":null,"url":null,"abstract":"Two types of hybrid silicon tapers are studied. Single taper loss is 0.3 – 0.5 dB, enabling integration of III/V actives on silicon-on-insulator passive circuitry with low loss. Keywords-Hybrid integration, silicon-on-insulator technology","PeriodicalId":141233,"journal":{"name":"8th IEEE International Conference on Group IV Photonics","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Low-loss hybrid silicon tapers\",\"authors\":\"P. Pintus, M. Heck, G. Kurczveil, J. Bowers\",\"doi\":\"10.1109/GROUP4.2011.6053715\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Two types of hybrid silicon tapers are studied. Single taper loss is 0.3 – 0.5 dB, enabling integration of III/V actives on silicon-on-insulator passive circuitry with low loss. Keywords-Hybrid integration, silicon-on-insulator technology\",\"PeriodicalId\":141233,\"journal\":{\"name\":\"8th IEEE International Conference on Group IV Photonics\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"8th IEEE International Conference on Group IV Photonics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GROUP4.2011.6053715\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"8th IEEE International Conference on Group IV Photonics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GROUP4.2011.6053715","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Two types of hybrid silicon tapers are studied. Single taper loss is 0.3 – 0.5 dB, enabling integration of III/V actives on silicon-on-insulator passive circuitry with low loss. Keywords-Hybrid integration, silicon-on-insulator technology
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