{"title":"动态可重构变速箱开关电容DC-DC转换器","authors":"D. Larsen, M. Vinter, I. Jørgensen","doi":"10.1109/NORCHIP.2018.8573520","DOIUrl":null,"url":null,"abstract":"A dual output battery-connected reconfigurable switched capacitor dc-dc converter (SCC) is presented. The design improves the overall power efficiency of the system by reconfiguring the SCC output stage based on the output load scenario. The number of capacitors to use in an SCC is a tradeoff between area and efficiency. Having more capacitors improves efficiency but increases the implementation area and cost. The proposed combined dynamically reconfigurable output stage changes the number of capacitors used for each output depending on the load. The implemented converter is compared with a solution where an SCC is implemented separately for each of the outputs. Transistor level simulations of the proposed and prior art output stages show an overall improved efficiency.","PeriodicalId":152077,"journal":{"name":"2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Dynamically Reconfigurable Gearbox Switched-Capacitor DC-DC Converter\",\"authors\":\"D. Larsen, M. Vinter, I. Jørgensen\",\"doi\":\"10.1109/NORCHIP.2018.8573520\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A dual output battery-connected reconfigurable switched capacitor dc-dc converter (SCC) is presented. The design improves the overall power efficiency of the system by reconfiguring the SCC output stage based on the output load scenario. The number of capacitors to use in an SCC is a tradeoff between area and efficiency. Having more capacitors improves efficiency but increases the implementation area and cost. The proposed combined dynamically reconfigurable output stage changes the number of capacitors used for each output depending on the load. The implemented converter is compared with a solution where an SCC is implemented separately for each of the outputs. Transistor level simulations of the proposed and prior art output stages show an overall improved efficiency.\",\"PeriodicalId\":152077,\"journal\":{\"name\":\"2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NORCHIP.2018.8573520\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NORCHIP.2018.8573520","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A dual output battery-connected reconfigurable switched capacitor dc-dc converter (SCC) is presented. The design improves the overall power efficiency of the system by reconfiguring the SCC output stage based on the output load scenario. The number of capacitors to use in an SCC is a tradeoff between area and efficiency. Having more capacitors improves efficiency but increases the implementation area and cost. The proposed combined dynamically reconfigurable output stage changes the number of capacitors used for each output depending on the load. The implemented converter is compared with a solution where an SCC is implemented separately for each of the outputs. Transistor level simulations of the proposed and prior art output stages show an overall improved efficiency.