降低EEPROM编程偏置与负电压，可靠性影响

Proceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT2002) Pub Date : 2002-07-10 DOI:10.1109/MTDT.2002.1029781

R. Laffont, J. Razafindramora, P. Canet, R. Bouchakour, J. Mirabel

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引用次数: 4

摘要

为了减小存储器单元的偏置极化，本文对EEPROM单元编程进行了研究。仿真结果表明，在正脉冲和负脉冲的极化下，可以实现对细胞的擦除和写入。对存储单元的测量证实了这些说法。此外，通过隧道氧化物的电场模拟没有显示出最大值的变化，这意味着对电池可靠性没有影响。对几个具有分裂极化的记忆细胞进行了耐力测试。它们显示了与经典编程相同的结果。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Decreasing EEPROM programming bias with negative voltage, reliability impact

This paper presents a study of EEPROM cell programming in order to decrease the bias polarization of the memory cell. Simulations show that it is possible to erase and write a cell with a divide up polarization, with positive and negative pulses. Measurements on a memory cell confirm these statements. Moreover simulations of the electrical field through the tunnel oxide didn't show any change of the maximum value, that means there is no impact on cell reliability. Endurance tests were performed on several memory cells with divide up polarizations. They show the same results as classical programming.

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Proceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT2002)

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