VHDL macro library testing using BOAR emulation tool

In this paper, the testing of DSP and telecommunication macro library with an FPGA based emulation platform is introduced. The BOAR emulation system is targeted for animating accurately the modern ASIC and processor based systems, which make it also an efficient tool for validating the VHDL based macro components. By utilizing the emulator as a part of an ASIC design process, the testing time of the macros is reduced from several months to a few days, providing also huge savings in ASIC development costs and time.