Soft Voting-Based Ensemble Approach to Predict Early Stage DRC Violations

Reducing human effort and design schedule time is facing a tremendous challenge from the cutting- edge technology node, which hinders profitability from IC manufacturing. Initiatives like DARPA IDEA have addressed this challenge by aiming for a 24-hour design turnaround time, maximum resource utilization, and productivity of ICs. In this paper, we proposed a robust ensemble learning model to predict DRC from the placement stage, which precisely predicts design routability and DRC hotspots of a design. The proposed algorithm uses a soft voting classifier to combine random forest and gradient boosting algorithms. Our approach achieved a maximum precision, recall, and F1 score of 97%, 97%, and 96%, respectively, which are significantly better than the state- of-the-art support-vector machine (SVM)-based prediction scheme.