S. Sahoo, Sanjib Kumar Panda, G. P. Mishra, S. Dash
{"title":"基于隧穿路径的双栅隧道场效应晶体管漏极电流解析模型","authors":"S. Sahoo, Sanjib Kumar Panda, G. P. Mishra, S. Dash","doi":"10.1109/ICETEESES.2016.7581405","DOIUrl":null,"url":null,"abstract":"This paper presents a 2D analytical model for symmetric double gate Tunnel Field Effect transistor (DG-TFET) based on tunneling path in the channel. The potential profile is obtained by solving 2D Poisson's equation in the rectangular coordinate system. The drain current is extracted by integrating the band to band tunneling generation rate, initial and final tunneling length. The primary focus is on initial tunneling length as it directly influence the drain current amplitude of the device. The DG-TFET shows ON-current improvement as compared with SG-TFET. The validation of analytical results with simulated results is done by TCAD device simulator.","PeriodicalId":322442,"journal":{"name":"2016 International Conference on Emerging Trends in Electrical Electronics & Sustainable Energy Systems (ICETEESES)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Tunneling path based analytical drain current model for double gate Tunnel FET (DG-TFET)\",\"authors\":\"S. Sahoo, Sanjib Kumar Panda, G. P. Mishra, S. Dash\",\"doi\":\"10.1109/ICETEESES.2016.7581405\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a 2D analytical model for symmetric double gate Tunnel Field Effect transistor (DG-TFET) based on tunneling path in the channel. The potential profile is obtained by solving 2D Poisson's equation in the rectangular coordinate system. The drain current is extracted by integrating the band to band tunneling generation rate, initial and final tunneling length. The primary focus is on initial tunneling length as it directly influence the drain current amplitude of the device. The DG-TFET shows ON-current improvement as compared with SG-TFET. The validation of analytical results with simulated results is done by TCAD device simulator.\",\"PeriodicalId\":322442,\"journal\":{\"name\":\"2016 International Conference on Emerging Trends in Electrical Electronics & Sustainable Energy Systems (ICETEESES)\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-03-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 International Conference on Emerging Trends in Electrical Electronics & Sustainable Energy Systems (ICETEESES)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICETEESES.2016.7581405\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Conference on Emerging Trends in Electrical Electronics & Sustainable Energy Systems (ICETEESES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICETEESES.2016.7581405","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Tunneling path based analytical drain current model for double gate Tunnel FET (DG-TFET)
This paper presents a 2D analytical model for symmetric double gate Tunnel Field Effect transistor (DG-TFET) based on tunneling path in the channel. The potential profile is obtained by solving 2D Poisson's equation in the rectangular coordinate system. The drain current is extracted by integrating the band to band tunneling generation rate, initial and final tunneling length. The primary focus is on initial tunneling length as it directly influence the drain current amplitude of the device. The DG-TFET shows ON-current improvement as compared with SG-TFET. The validation of analytical results with simulated results is done by TCAD device simulator.