Semi-Theoretical Prediction of Turn-off Surge Voltage in a SiC MOSFET Power Module with an Embedded DC-link Decoupling Capacitor

This paper presents a semi-theoretical method for predicting the turn-off surge voltage (Vsurge) in double-pulse test (DPT) using a power module (PM) with serially-connected SiC MOSFET transistors structuring half-bridge, in which module a DC-link decoupling capacitor is also embedded. The circuit equations are simplified based on the fact that the MOSFETs act as their own parasitic capacitance, diode, or resistor having channel resistance (Rch) in their transient modes, but the drain-source voltage (Vds) dependency of the capacitances and gate-source voltage dependent Rch are taken into circuit behavior calculations. The partial element equivalent circuit (PEEC) method is used to estimate the stray inductances (Ls) of the PM. Other Ls’s are empirically obtained by impedance measurement and preliminarily performed switching waveforms. Finally, multiple Kirchhoff’s laws-based equations are simultaneously solved. This calculation process is semi-theoretical, and sufficiently predicts the Vsurge observed in DPT performed under various conditions.