一种用于20nm以下NAND闪存技术的超薄混合浮栅概念

2011 3rd IEEE International Memory Workshop (IMW) Pub Date : 2011-05-22 DOI:10.1109/IMW.2011.5873198

D. Wellekens, P. Blomme, M. Rosmeulen, T. Schram, A. Cacciato, I. Debusschere, J. van Houdt, S. Van Aerde

{"title":"一种用于20nm以下NAND闪存技术的超薄混合浮栅概念","authors":"D. Wellekens, P. Blomme, M. Rosmeulen, T. Schram, A. Cacciato, I. Debusschere, J. van Houdt, S. Van Aerde","doi":"10.1109/IMW.2011.5873198","DOIUrl":null,"url":null,"abstract":"A nonvolatile memory structure with hybrid (poly/metal) floating gate in combination with an Al2O3 interpoly dielectric is investigated for sub-20nm scaling. Floating gate thickness scaling down to only 5nm with excellent program/erase performance and reliability is demonstrated to address the issue of increased cell-to-cell interference. It is further shown that a hybrid floating gate also offers great benefit when used in combination with ONO, which still is the conventional interpoly dielectric layer used in state-of-the-art floating gate Flash memories.","PeriodicalId":261995,"journal":{"name":"2011 3rd IEEE International Memory Workshop (IMW)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"An Ultra-Thin Hybrid Floating Gate Concept for Sub-20nm NAND Flash Technologies\",\"authors\":\"D. Wellekens, P. Blomme, M. Rosmeulen, T. Schram, A. Cacciato, I. Debusschere, J. van Houdt, S. Van Aerde\",\"doi\":\"10.1109/IMW.2011.5873198\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A nonvolatile memory structure with hybrid (poly/metal) floating gate in combination with an Al2O3 interpoly dielectric is investigated for sub-20nm scaling. Floating gate thickness scaling down to only 5nm with excellent program/erase performance and reliability is demonstrated to address the issue of increased cell-to-cell interference. It is further shown that a hybrid floating gate also offers great benefit when used in combination with ONO, which still is the conventional interpoly dielectric layer used in state-of-the-art floating gate Flash memories.\",\"PeriodicalId\":261995,\"journal\":{\"name\":\"2011 3rd IEEE International Memory Workshop (IMW)\",\"volume\":\"55 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 3rd IEEE International Memory Workshop (IMW)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMW.2011.5873198\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 3rd IEEE International Memory Workshop (IMW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMW.2011.5873198","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 12

摘要

研究了一种混合(聚/金属)浮栅与Al2O3内插电介质相结合的非易失性存储结构在亚20nm尺度下的应用。浮栅厚度缩小到仅5nm，具有出色的程序/擦除性能和可靠性，可以解决细胞间干扰增加的问题。进一步表明，混合浮栅在与ONO结合使用时也提供了很大的好处，ONO仍然是最先进的浮栅闪存中使用的传统内插介电层。

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An Ultra-Thin Hybrid Floating Gate Concept for Sub-20nm NAND Flash Technologies

A nonvolatile memory structure with hybrid (poly/metal) floating gate in combination with an Al2O3 interpoly dielectric is investigated for sub-20nm scaling. Floating gate thickness scaling down to only 5nm with excellent program/erase performance and reliability is demonstrated to address the issue of increased cell-to-cell interference. It is further shown that a hybrid floating gate also offers great benefit when used in combination with ONO, which still is the conventional interpoly dielectric layer used in state-of-the-art floating gate Flash memories.

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2011 3rd IEEE International Memory Workshop (IMW)

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