测试集编码,有效的顺序电路测试

V. Iyengar, K. Chakrabarty, B. Murray
{"title":"测试集编码,有效的顺序电路测试","authors":"V. Iyengar, K. Chakrabarty, B. Murray","doi":"10.1109/IMTC.1997.612438","DOIUrl":null,"url":null,"abstract":"Practical sequential circuits are hard to test because they contain a large number of internal states that are difficult to control and observe. Scan design is often used to simplify testing; however, it is not always applicable because of area and performance penalties. Recent advances in sequential circuit testing have led to techniques and tools that provide test sets with high coverage of single stuckline (SSL) faults for non-scan circuits. However, these test sets contain a large number of patterns and require a tester with considerable pattern depth. We propose a novel method for encoding patterns such that the test set can be applied using low-cost testers that do not require excessive memory. We demonstrate the feasibility of our approach by applying it to SSL test sets for the ISCAS 89 benchmarks.","PeriodicalId":124893,"journal":{"name":"IEEE Instrumentation and Measurement Technology Conference Sensing, Processing, Networking. IMTC Proceedings","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Test set encoding for efficient sequential circuit testing\",\"authors\":\"V. Iyengar, K. Chakrabarty, B. Murray\",\"doi\":\"10.1109/IMTC.1997.612438\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Practical sequential circuits are hard to test because they contain a large number of internal states that are difficult to control and observe. Scan design is often used to simplify testing; however, it is not always applicable because of area and performance penalties. Recent advances in sequential circuit testing have led to techniques and tools that provide test sets with high coverage of single stuckline (SSL) faults for non-scan circuits. However, these test sets contain a large number of patterns and require a tester with considerable pattern depth. We propose a novel method for encoding patterns such that the test set can be applied using low-cost testers that do not require excessive memory. We demonstrate the feasibility of our approach by applying it to SSL test sets for the ISCAS 89 benchmarks.\",\"PeriodicalId\":124893,\"journal\":{\"name\":\"IEEE Instrumentation and Measurement Technology Conference Sensing, Processing, Networking. IMTC Proceedings\",\"volume\":\"37 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-05-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Instrumentation and Measurement Technology Conference Sensing, Processing, Networking. IMTC Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMTC.1997.612438\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Instrumentation and Measurement Technology Conference Sensing, Processing, Networking. IMTC Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMTC.1997.612438","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

实际的顺序电路很难测试,因为它们包含大量难以控制和观察的内部状态。扫描设计通常用于简化测试;但是,由于面积和性能的限制,它并不总是适用的。顺序电路测试的最新进展导致了技术和工具,为非扫描电路提供了高覆盖率的单堵线(SSL)故障测试集。然而,这些测试集包含大量的模式,并且需要具有相当模式深度的测试人员。我们提出了一种新的模式编码方法,使测试集可以使用不需要过多内存的低成本测试器。我们通过将该方法应用于ISCAS 89基准的SSL测试集来证明其可行性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Test set encoding for efficient sequential circuit testing
Practical sequential circuits are hard to test because they contain a large number of internal states that are difficult to control and observe. Scan design is often used to simplify testing; however, it is not always applicable because of area and performance penalties. Recent advances in sequential circuit testing have led to techniques and tools that provide test sets with high coverage of single stuckline (SSL) faults for non-scan circuits. However, these test sets contain a large number of patterns and require a tester with considerable pattern depth. We propose a novel method for encoding patterns such that the test set can be applied using low-cost testers that do not require excessive memory. We demonstrate the feasibility of our approach by applying it to SSL test sets for the ISCAS 89 benchmarks.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信