{"title":"用氧化钇掺杂碳纳米管晶体管的n型","authors":"L. Liyanage, G. Pitner, Xiaoqing Xu, H. Wong","doi":"10.1109/VLSI-TSA.2014.6839667","DOIUrl":null,"url":null,"abstract":"We present a novel, VLSI compatible technique to fabricate n-type carbon nanotube (CNT) transistors using yttrium oxide as gate dielectric. Wafer-scale, aligned CNT transistors with yttrium oxide (Y<sub>2</sub>O<sub>x</sub>) dielectrics exhibit n-type behavior with I<sub>on</sub>/I<sub>off</sub> of 10<sup>6</sup> and subthreshold slope of 95 mV/dec. Controlled, slow evaporation of yttrium (Y) forms a smooth oxide surface that has excellent wetting to CNTs which consistently gives rise to strong n-type behavior in CNT transistors.","PeriodicalId":403085,"journal":{"name":"Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"N-type doping of carbon nanotube transistors using yttrium oxide (Y2Ox)\",\"authors\":\"L. Liyanage, G. Pitner, Xiaoqing Xu, H. Wong\",\"doi\":\"10.1109/VLSI-TSA.2014.6839667\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present a novel, VLSI compatible technique to fabricate n-type carbon nanotube (CNT) transistors using yttrium oxide as gate dielectric. Wafer-scale, aligned CNT transistors with yttrium oxide (Y<sub>2</sub>O<sub>x</sub>) dielectrics exhibit n-type behavior with I<sub>on</sub>/I<sub>off</sub> of 10<sup>6</sup> and subthreshold slope of 95 mV/dec. Controlled, slow evaporation of yttrium (Y) forms a smooth oxide surface that has excellent wetting to CNTs which consistently gives rise to strong n-type behavior in CNT transistors.\",\"PeriodicalId\":403085,\"journal\":{\"name\":\"Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-04-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSI-TSA.2014.6839667\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSI-TSA.2014.6839667","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
N-type doping of carbon nanotube transistors using yttrium oxide (Y2Ox)
We present a novel, VLSI compatible technique to fabricate n-type carbon nanotube (CNT) transistors using yttrium oxide as gate dielectric. Wafer-scale, aligned CNT transistors with yttrium oxide (Y2Ox) dielectrics exhibit n-type behavior with Ion/Ioff of 106 and subthreshold slope of 95 mV/dec. Controlled, slow evaporation of yttrium (Y) forms a smooth oxide surface that has excellent wetting to CNTs which consistently gives rise to strong n-type behavior in CNT transistors.