栅极微结构对CMOS晶体管可靠性和性能的影响

B. Yu, T. King, C. Hu, D. Ju, N. Kepler
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引用次数: 1

摘要

本文研究了互补金属氧化物半导体(CMOS)栅极微结构对深亚微米CMOS晶体管可靠性和性能的影响。非晶硅(/spl α /-Si)栅极在p/sup +/掺杂栅p沟道mosfet中具有更好的抑制硼渗透的能力,但/spl α /-Si栅极的栅极耗尽比多晶硅栅极略严重。具有两种不同栅极微结构的mosfet之间的线性g/sub - m/差异表现出强烈的L/sub - g/-依赖性,这一栅极长度依赖栅极耗尽效应被报道并通过沿晶界的杂质扩散来解释。本文还讨论了栅极氮植入作为抑制硼扩散的有效方法,重点讨论了对器件可靠性和性能的影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
CMOS transistor reliability and performance impacted by gate microstructure
This paper investigate the impact of CMOS (complementary metal-oxide-semiconductor) gate microstructure on the reliability and performance of deep-submicrometer CMOS transistors. The amorphous silicon (/spl alpha/-Si) gate provides better capability for suppression of boron penetration in p/sup +/ doped gate p-channel MOSFETs, but gate depletion in the /spl alpha/-Si gate is slightly more severe than that of the poly-Si gate. The gate-length-dependent gate-depletion effect, in which the difference in linear g/sub m/ between MOSFETs with two different gate microstructures shows a strong L/sub g/-dependence, is reported and interpreted by impurity diffusion along the grain boundary. A gate nitrogen implant as an effective method for suppression of the boron diffusion is also discussed with emphasis on the impact on both device reliability and performance.
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