{"title":"重复ESD应力下600V soi - light电学参数退化研究","authors":"Li Lu, Ran Ye, Siyang Liu, Weifeng Sun","doi":"10.1109/IPFA47161.2019.8984813","DOIUrl":null,"url":null,"abstract":"Electrical parameters degradations of silicon-on-insulator (SOI) lateral insulated-gate bipolar transistor (LIGBT) under repetitive electrostatic discharge (ESD) stresses have been investigated. After the repetitive ESD stresses, the degradation of threshold voltage (Vth) can be neglected due to the intact channel region. The decrease of on-resistance (Ron) is dominated by hot holes injection into the field oxide at the bird’s beak. Moreover, the saturation current (Ice,sat) is decreased dramatically because of hot holes injection and interface states generation at the poly-gate edge. Finally, a novel structure with an additional P-type region beneath the poly-gate edge has been proposed to suppress the device degradation under repetitive ESD stresses.","PeriodicalId":169775,"journal":{"name":"2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"126 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Investigation of Electrical Parameters Degradations for 600V SOI-LIGBT under Repetitive ESD Stresses\",\"authors\":\"Li Lu, Ran Ye, Siyang Liu, Weifeng Sun\",\"doi\":\"10.1109/IPFA47161.2019.8984813\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Electrical parameters degradations of silicon-on-insulator (SOI) lateral insulated-gate bipolar transistor (LIGBT) under repetitive electrostatic discharge (ESD) stresses have been investigated. After the repetitive ESD stresses, the degradation of threshold voltage (Vth) can be neglected due to the intact channel region. The decrease of on-resistance (Ron) is dominated by hot holes injection into the field oxide at the bird’s beak. Moreover, the saturation current (Ice,sat) is decreased dramatically because of hot holes injection and interface states generation at the poly-gate edge. Finally, a novel structure with an additional P-type region beneath the poly-gate edge has been proposed to suppress the device degradation under repetitive ESD stresses.\",\"PeriodicalId\":169775,\"journal\":{\"name\":\"2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"volume\":\"126 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA47161.2019.8984813\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA47161.2019.8984813","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Investigation of Electrical Parameters Degradations for 600V SOI-LIGBT under Repetitive ESD Stresses
Electrical parameters degradations of silicon-on-insulator (SOI) lateral insulated-gate bipolar transistor (LIGBT) under repetitive electrostatic discharge (ESD) stresses have been investigated. After the repetitive ESD stresses, the degradation of threshold voltage (Vth) can be neglected due to the intact channel region. The decrease of on-resistance (Ron) is dominated by hot holes injection into the field oxide at the bird’s beak. Moreover, the saturation current (Ice,sat) is decreased dramatically because of hot holes injection and interface states generation at the poly-gate edge. Finally, a novel structure with an additional P-type region beneath the poly-gate edge has been proposed to suppress the device degradation under repetitive ESD stresses.