Early detection of design sensitivities that cause yield loss for new products

This paper describes an analytical method for detecting IC design sensitivities that adversely, affect wafer probe yields. The same method can also detect systematic process problems that affect probe yields. The method not only detects these sensitivities, but also can give valuable information about why the probe yield is affected. Also, quantitative yield limits can be calculated for each sensitivity thus making it possible to create a yield loss Pareto and concentrate yield improvement efforts on those sensitivities causing the greatest loss. This method has proven to be accurate and reliable when performed on data from significantly fewer wafers than might be required for other techniques. An automated computer program has been developed by the authors to perform the analysis.