{"title":"INCA:用于模拟的下一代架构","authors":"J. Lawrence, C. Ussery","doi":"10.1109/IVC.1996.496012","DOIUrl":null,"url":null,"abstract":"The paper presents INCA, the Interleaved Native-Compiled code Architecture for simulation. INCA is a flexible strategy to create optimized simulations involving multiple design styles, languages, and scheduling paradigms. INCA emphasizes optimized compilers for HDLs vs. more traditional kernel-based approaches. The critical aspects of the architecture include: the separation of kernel and language, usage of elaboration to construct optimal simulation executables, method-based network evaluation, and techniques for mixing different scheduling approaches.","PeriodicalId":330849,"journal":{"name":"Proceedings. IEEE International Verilog HDL Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"INCA: a next-generation architecture for simulation\",\"authors\":\"J. Lawrence, C. Ussery\",\"doi\":\"10.1109/IVC.1996.496012\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper presents INCA, the Interleaved Native-Compiled code Architecture for simulation. INCA is a flexible strategy to create optimized simulations involving multiple design styles, languages, and scheduling paradigms. INCA emphasizes optimized compilers for HDLs vs. more traditional kernel-based approaches. The critical aspects of the architecture include: the separation of kernel and language, usage of elaboration to construct optimal simulation executables, method-based network evaluation, and techniques for mixing different scheduling approaches.\",\"PeriodicalId\":330849,\"journal\":{\"name\":\"Proceedings. IEEE International Verilog HDL Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-03-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. IEEE International Verilog HDL Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IVC.1996.496012\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. IEEE International Verilog HDL Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IVC.1996.496012","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
INCA: a next-generation architecture for simulation
The paper presents INCA, the Interleaved Native-Compiled code Architecture for simulation. INCA is a flexible strategy to create optimized simulations involving multiple design styles, languages, and scheduling paradigms. INCA emphasizes optimized compilers for HDLs vs. more traditional kernel-based approaches. The critical aspects of the architecture include: the separation of kernel and language, usage of elaboration to construct optimal simulation executables, method-based network evaluation, and techniques for mixing different scheduling approaches.