{"title":"双多晶硅技术中的16K MOS RAM","authors":"R. Mitterer, B. Rehn","doi":"10.1109/ESSCIRC.1976.5469235","DOIUrl":null,"url":null,"abstract":"A 16 384 bit-RAM with a chip area of 23 mm2, using double-polysilicon technology, is presented. The device with a 300 ns access time fits in a 16 pin package. Circuit Principles for cell and sense amplifier and read-modify-write and page-mode operation are treated.","PeriodicalId":378614,"journal":{"name":"ESSCIRC 76: 2nd European Solid State Circuits Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1976-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A 16K MOS RAM in Double-Polysilicon Technology\",\"authors\":\"R. Mitterer, B. Rehn\",\"doi\":\"10.1109/ESSCIRC.1976.5469235\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 16 384 bit-RAM with a chip area of 23 mm2, using double-polysilicon technology, is presented. The device with a 300 ns access time fits in a 16 pin package. Circuit Principles for cell and sense amplifier and read-modify-write and page-mode operation are treated.\",\"PeriodicalId\":378614,\"journal\":{\"name\":\"ESSCIRC 76: 2nd European Solid State Circuits Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1976-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 76: 2nd European Solid State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.1976.5469235\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 76: 2nd European Solid State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1976.5469235","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 16 384 bit-RAM with a chip area of 23 mm2, using double-polysilicon technology, is presented. The device with a 300 ns access time fits in a 16 pin package. Circuit Principles for cell and sense amplifier and read-modify-write and page-mode operation are treated.
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