{"title":"用最佳线性逼近分析锁相环","authors":"D. Peumans, A. Cooman, G. Vandersteen","doi":"10.1109/SMACD.2016.7520652","DOIUrl":null,"url":null,"abstract":"During the early design stage of Phase-Locked Loops, linear models are thoroughly used to analyse the steady-state behaviour. In reality, the envisioned linear performance is degraded due to nonlinearities present in the actual implementation. Lately, a nonlinear modelling technique based on the Best Linear Approximation has been developed which allows to verify the validity of this linear model and, in addition, permits to characterise the nonlinear distortions present in the system. Incorporating this Best Linear Approximation in the design stage allows to intuitively analyse the nonlinear behaviour of the Phase-Locked Loop.","PeriodicalId":441203,"journal":{"name":"2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Analysis of Phase-Locked Loops using the Best Linear Approximation\",\"authors\":\"D. Peumans, A. Cooman, G. Vandersteen\",\"doi\":\"10.1109/SMACD.2016.7520652\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"During the early design stage of Phase-Locked Loops, linear models are thoroughly used to analyse the steady-state behaviour. In reality, the envisioned linear performance is degraded due to nonlinearities present in the actual implementation. Lately, a nonlinear modelling technique based on the Best Linear Approximation has been developed which allows to verify the validity of this linear model and, in addition, permits to characterise the nonlinear distortions present in the system. Incorporating this Best Linear Approximation in the design stage allows to intuitively analyse the nonlinear behaviour of the Phase-Locked Loop.\",\"PeriodicalId\":441203,\"journal\":{\"name\":\"2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)\",\"volume\":\"69 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMACD.2016.7520652\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMACD.2016.7520652","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analysis of Phase-Locked Loops using the Best Linear Approximation
During the early design stage of Phase-Locked Loops, linear models are thoroughly used to analyse the steady-state behaviour. In reality, the envisioned linear performance is degraded due to nonlinearities present in the actual implementation. Lately, a nonlinear modelling technique based on the Best Linear Approximation has been developed which allows to verify the validity of this linear model and, in addition, permits to characterise the nonlinear distortions present in the system. Incorporating this Best Linear Approximation in the design stage allows to intuitively analyse the nonlinear behaviour of the Phase-Locked Loop.