{"title":"ESD和闭锁:计算机辅助设计(CAD)工具和方法为今天和未来的超大规模集成电路设计","authors":"S. Voldman","doi":"10.1109/ICASIC.2007.4415645","DOIUrl":null,"url":null,"abstract":"In summary, new methods for ESD and latchup analysis are being utilized to address today's technical problems in products, and design tools. As semiconductor tool and product complexity increases, future concepts are needed to address system on chip integration problems.","PeriodicalId":120984,"journal":{"name":"2007 7th International Conference on ASIC","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"ESD and latchup: Computer aided design (CAD) tools and methodologies for today and future VLSI designs\",\"authors\":\"S. Voldman\",\"doi\":\"10.1109/ICASIC.2007.4415645\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In summary, new methods for ESD and latchup analysis are being utilized to address today's technical problems in products, and design tools. As semiconductor tool and product complexity increases, future concepts are needed to address system on chip integration problems.\",\"PeriodicalId\":120984,\"journal\":{\"name\":\"2007 7th International Conference on ASIC\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 7th International Conference on ASIC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICASIC.2007.4415645\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 7th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICASIC.2007.4415645","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
ESD and latchup: Computer aided design (CAD) tools and methodologies for today and future VLSI designs
In summary, new methods for ESD and latchup analysis are being utilized to address today's technical problems in products, and design tools. As semiconductor tool and product complexity increases, future concepts are needed to address system on chip integration problems.