{"title":"cDNA微阵列图像边缘检测的硬件实现","authors":"B. Belean, M. Borda, A. Fazakas","doi":"10.5220/0001536403590363","DOIUrl":null,"url":null,"abstract":"The present paper proposes hardware implementation strategies for cDNA microarray image processing in order to overcome the main disadvantage introduced by the existing computational tools, the increased processing time. A hardware implementation of the Canny edge detection algorithm for microarray spots is described. The implementation takes advantage of spatial and temporal parallelism offered by FPGA technology. Results of the hardware implementation which prove time and cost efficiency are presented.","PeriodicalId":357085,"journal":{"name":"International Conference on Biomedical Electronics and Devices","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Hardware Implementation for Edge Detection in cDNA Microarray Images\",\"authors\":\"B. Belean, M. Borda, A. Fazakas\",\"doi\":\"10.5220/0001536403590363\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The present paper proposes hardware implementation strategies for cDNA microarray image processing in order to overcome the main disadvantage introduced by the existing computational tools, the increased processing time. A hardware implementation of the Canny edge detection algorithm for microarray spots is described. The implementation takes advantage of spatial and temporal parallelism offered by FPGA technology. Results of the hardware implementation which prove time and cost efficiency are presented.\",\"PeriodicalId\":357085,\"journal\":{\"name\":\"International Conference on Biomedical Electronics and Devices\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-06-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Conference on Biomedical Electronics and Devices\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.5220/0001536403590363\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Biomedical Electronics and Devices","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.5220/0001536403590363","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hardware Implementation for Edge Detection in cDNA Microarray Images
The present paper proposes hardware implementation strategies for cDNA microarray image processing in order to overcome the main disadvantage introduced by the existing computational tools, the increased processing time. A hardware implementation of the Canny edge detection algorithm for microarray spots is described. The implementation takes advantage of spatial and temporal parallelism offered by FPGA technology. Results of the hardware implementation which prove time and cost efficiency are presented.