{"title":"IBIS数字I/O缓冲器瞬态行为模型的提取","authors":"P. Tehrani, Yuzbe Chen, J. Fang","doi":"10.1109/ECTC.1996.550806","DOIUrl":null,"url":null,"abstract":"A method for extraction and simulation of transient behavioral models of state transition of digital I/O buffers is introduced. This scheme increases the speed of chip interconnect simulations with large number of simultaneous switching devices, while maintaining good accuracy compared to corresponding transistor level models. This paper covers the derivation procedures of such transient state transition behavioral models from IBIS modeling data. A comparison of simulation results between these models and transistor level models (SPICE models) is also included.","PeriodicalId":143519,"journal":{"name":"1996 Proceedings 46th Electronic Components and Technology Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"21","resultStr":"{\"title\":\"Extraction of transient behavioral model of digital I/O buffers from IBIS\",\"authors\":\"P. Tehrani, Yuzbe Chen, J. Fang\",\"doi\":\"10.1109/ECTC.1996.550806\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A method for extraction and simulation of transient behavioral models of state transition of digital I/O buffers is introduced. This scheme increases the speed of chip interconnect simulations with large number of simultaneous switching devices, while maintaining good accuracy compared to corresponding transistor level models. This paper covers the derivation procedures of such transient state transition behavioral models from IBIS modeling data. A comparison of simulation results between these models and transistor level models (SPICE models) is also included.\",\"PeriodicalId\":143519,\"journal\":{\"name\":\"1996 Proceedings 46th Electronic Components and Technology Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-05-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"21\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1996 Proceedings 46th Electronic Components and Technology Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.1996.550806\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1996 Proceedings 46th Electronic Components and Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.1996.550806","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Extraction of transient behavioral model of digital I/O buffers from IBIS
A method for extraction and simulation of transient behavioral models of state transition of digital I/O buffers is introduced. This scheme increases the speed of chip interconnect simulations with large number of simultaneous switching devices, while maintaining good accuracy compared to corresponding transistor level models. This paper covers the derivation procedures of such transient state transition behavioral models from IBIS modeling data. A comparison of simulation results between these models and transistor level models (SPICE models) is also included.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
