{"title":"CMOS动态随机存取存储器中字行驱动电路的新概念","authors":"W. Pribyl, J. Harter, W. Reczek, R. Strunz","doi":"10.1109/ESSCIRC.1988.5468473","DOIUrl":null,"url":null,"abstract":"NMOS-type circuits for wordline driving circuits in CMOS-DRAMs are discussed. Associated reliability risks and circuit design problems are shown. As a solution to these problems, a new concept using true CMOS circuitry for wordline driving circuits is presented. Simulation results indicate significant advantages. Measurement results obtained from a realization on a 4 Megabit DRAM are presented at the conference.","PeriodicalId":197244,"journal":{"name":"ESSCIRC '88: Fourteenth European Solid-State Circuits Conference","volume":"2014 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"New Concepts for Wordline Driving Circuits in CMOS Dynamic Random Access Memories\",\"authors\":\"W. Pribyl, J. Harter, W. Reczek, R. Strunz\",\"doi\":\"10.1109/ESSCIRC.1988.5468473\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"NMOS-type circuits for wordline driving circuits in CMOS-DRAMs are discussed. Associated reliability risks and circuit design problems are shown. As a solution to these problems, a new concept using true CMOS circuitry for wordline driving circuits is presented. Simulation results indicate significant advantages. Measurement results obtained from a realization on a 4 Megabit DRAM are presented at the conference.\",\"PeriodicalId\":197244,\"journal\":{\"name\":\"ESSCIRC '88: Fourteenth European Solid-State Circuits Conference\",\"volume\":\"2014 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1988-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC '88: Fourteenth European Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.1988.5468473\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC '88: Fourteenth European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1988.5468473","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
New Concepts for Wordline Driving Circuits in CMOS Dynamic Random Access Memories
NMOS-type circuits for wordline driving circuits in CMOS-DRAMs are discussed. Associated reliability risks and circuit design problems are shown. As a solution to these problems, a new concept using true CMOS circuitry for wordline driving circuits is presented. Simulation results indicate significant advantages. Measurement results obtained from a realization on a 4 Megabit DRAM are presented at the conference.