{"title":"3D集成的机会、问题和解决方案:设计师的视角","authors":"D. Kwai, Cheng-Wen Wu","doi":"10.1117/12.845747","DOIUrl":null,"url":null,"abstract":"As the development cost of a typical system-on-chip (SOC) using state-of-the-art technology soars, more and more people turn to three-dimensional (3D) integration for possible alternatives that provide better or equal performance with lower cost. Stacking dies using the through-silicon-via (TSV) technology has been considered one of the most promising solutions to extending the life of Moore's law in semiconductor industry, but of course there are problems to be solved before the infrastructure can be set up to support the industry for manufacturing TSV-based 3D integrated devices. In this paper we will discuss the opportunities, design and manufacturing issues, and possible solutions for 3D integrated devices, from a designer's perspective.","PeriodicalId":383504,"journal":{"name":"Lithography Asia","volume":"7520 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"3D integration opportunities, issues, and solutions: a designer's perspective\",\"authors\":\"D. Kwai, Cheng-Wen Wu\",\"doi\":\"10.1117/12.845747\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As the development cost of a typical system-on-chip (SOC) using state-of-the-art technology soars, more and more people turn to three-dimensional (3D) integration for possible alternatives that provide better or equal performance with lower cost. Stacking dies using the through-silicon-via (TSV) technology has been considered one of the most promising solutions to extending the life of Moore's law in semiconductor industry, but of course there are problems to be solved before the infrastructure can be set up to support the industry for manufacturing TSV-based 3D integrated devices. In this paper we will discuss the opportunities, design and manufacturing issues, and possible solutions for 3D integrated devices, from a designer's perspective.\",\"PeriodicalId\":383504,\"journal\":{\"name\":\"Lithography Asia\",\"volume\":\"7520 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-12-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Lithography Asia\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1117/12.845747\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Lithography Asia","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1117/12.845747","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
3D integration opportunities, issues, and solutions: a designer's perspective
As the development cost of a typical system-on-chip (SOC) using state-of-the-art technology soars, more and more people turn to three-dimensional (3D) integration for possible alternatives that provide better or equal performance with lower cost. Stacking dies using the through-silicon-via (TSV) technology has been considered one of the most promising solutions to extending the life of Moore's law in semiconductor industry, but of course there are problems to be solved before the infrastructure can be set up to support the industry for manufacturing TSV-based 3D integrated devices. In this paper we will discuss the opportunities, design and manufacturing issues, and possible solutions for 3D integrated devices, from a designer's perspective.