用于亚微米MOSFET制造的新边缘定义垂直蚀刻方法

W. Hunter, T. Holloway, P. Chatterjee, A. Tasch
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引用次数: 15

摘要

本文介绍了一种新的、方便的基于标准光学光刻和垂直(各向异性)干刻蚀的“切边回填”技术,用于形成边缘确定的亚微米元件。使用这种方法可以制造物理通道长度为0.3 \microm至\simeq 1.0微米的mosfet,该方法与另一种垂直蚀刻,边缘定义技术进行了比较,该技术能够制造物理栅极长度为0.1-0.4 \microm。特别是,已经制造出了l \simeq 0.1 \microm的mosfet,据信是迄今为止报道的最小的mosfet。还描述了一种形成钝化侧壁氧化物的垂直蚀刻技术。该技术的修改,以制造自对准浅/深n+/n++结,具有降低串联电阻和短通道效应(特别是穿孔)的说明。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
New edge-defined vertical-etch approaches for submicrometer MOSFET fabrication
This paper describes a new, convenient "undercut and backfill" technique for forming edge-defined submicrometer elements based only on standard optical lithography and vertical (anisotropic) dry etching. MOSFETs having physical channel lengths from0.3 \microm to\simeq 1.0 microm can be fabricated using this approach, This method is compared with an alternative vertical etch, edge-defined technique which is capable of fabricating physical gate lengths oF0.1-0.4 \microm. In particular, MOSFETs havingL \simeq 0.1 \microm, believed to be the smallest reported to date, have been made. A vertical etching technique which forms a passivating sidewall oxide is also described. Modifications of this technique to fabricate self-aligned shallow/deep n+/n++ junctions having reduced series resistance and short-channel effects (in particular punchthrough) are illustrated.
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