{"title":"一个视频D/ a转换器的全定制CMOS设计和测量","authors":"J. Vanneuville, D. Gevaert, J. Sevenhans","doi":"10.1109/ASIC.1995.580731","DOIUrl":null,"url":null,"abstract":"This paper describes the design and testing of a video 8-bit D/A converter, based on 63 binary non-weighted current cells, arranged in a 8/spl times/8 matrix for the 6 MSBs and 2 binary weighted current cells for the 2 LSBs. Each current cell is provided with a balanced output. Cascode transistors are used to increase the accuracy and speed of the switching current cells. The design has been simulated with HSPICE and processed in ES2 1.5 /spl mu/m CMOS technology. Measurement results are included.","PeriodicalId":307095,"journal":{"name":"Proceedings of Eighth International Application Specific Integrated Circuits Conference","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Full custom CMOS design and measurement of a video D/A converter\",\"authors\":\"J. Vanneuville, D. Gevaert, J. Sevenhans\",\"doi\":\"10.1109/ASIC.1995.580731\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes the design and testing of a video 8-bit D/A converter, based on 63 binary non-weighted current cells, arranged in a 8/spl times/8 matrix for the 6 MSBs and 2 binary weighted current cells for the 2 LSBs. Each current cell is provided with a balanced output. Cascode transistors are used to increase the accuracy and speed of the switching current cells. The design has been simulated with HSPICE and processed in ES2 1.5 /spl mu/m CMOS technology. Measurement results are included.\",\"PeriodicalId\":307095,\"journal\":{\"name\":\"Proceedings of Eighth International Application Specific Integrated Circuits Conference\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-09-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Eighth International Application Specific Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1995.580731\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Eighth International Application Specific Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1995.580731","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Full custom CMOS design and measurement of a video D/A converter
This paper describes the design and testing of a video 8-bit D/A converter, based on 63 binary non-weighted current cells, arranged in a 8/spl times/8 matrix for the 6 MSBs and 2 binary weighted current cells for the 2 LSBs. Each current cell is provided with a balanced output. Cascode transistors are used to increase the accuracy and speed of the switching current cells. The design has been simulated with HSPICE and processed in ES2 1.5 /spl mu/m CMOS technology. Measurement results are included.