一种0.13/spl mu/m CMOS 10Gb/s突发模式自适应增益选择限制放大器

2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers Pub Date : 2006-09-18 DOI:10.1109/ISSCC.2006.1696135

M. Nogawa, Y. Ohtomo, S. Kimura, K. Nishimura, T. Kawamura, M. Togashi

{"title":"一种0.13/spl mu/m CMOS 10Gb/s突发模式自适应增益选择限制放大器","authors":"M. Nogawa, Y. Ohtomo, S. Kimura, K. Nishimura, T. Kawamura, M. Togashi","doi":"10.1109/ISSCC.2006.1696135","DOIUrl":null,"url":null,"abstract":"A 10Gb/s burst-mode limiting amplifier is developed in a 0.13mum CMOS process. An adaptive gain-selection technique achieves a settling time of 0.8ns and a wide input dynamic range of 28dB, which is five-times wider than that of previous work at 10Gb/s","PeriodicalId":166617,"journal":{"name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13/spl mu/m CMOS\",\"authors\":\"M. Nogawa, Y. Ohtomo, S. Kimura, K. Nishimura, T. Kawamura, M. Togashi\",\"doi\":\"10.1109/ISSCC.2006.1696135\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 10Gb/s burst-mode limiting amplifier is developed in a 0.13mum CMOS process. An adaptive gain-selection technique achieves a settling time of 0.8ns and a wide input dynamic range of 28dB, which is five-times wider than that of previous work at 10Gb/s\",\"PeriodicalId\":166617,\"journal\":{\"name\":\"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-09-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2006.1696135\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2006.1696135","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 7

摘要

采用0.13 μ m CMOS工艺，研制了10Gb/s突发模式限制放大器。采用自适应增益选择技术实现了0.8ns的稳定时间和28dB的宽输入动态范围，在10Gb/s的速度下比以前的工作宽了5倍

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A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13/spl mu/m CMOS

A 10Gb/s burst-mode limiting amplifier is developed in a 0.13mum CMOS process. An adaptive gain-selection technique achieves a settling time of 0.8ns and a wide input dynamic range of 28dB, which is five-times wider than that of previous work at 10Gb/s

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2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers

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