{"title":"一个CMOS 100mhz数字示波器点处理器和时基集成电路","authors":"E. Etheridge","doi":"10.1109/CICC.1989.56737","DOIUrl":null,"url":null,"abstract":"A 100-MHz, 1.5-μm CMOS point processor/demultiplexer and time base integrated circuit has been developed for use in a digitizing oscilloscope. The component uses a single +5-V supply, accepts standard, negative ECL (emitter-coupled logic)-level inputs, and contains 46000 devices on a 311-mil×325-mil die. Those aspects of the design that comprise novel or improved circuitry or design techniques are described","PeriodicalId":165054,"journal":{"name":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A CMOS 100 MHz digital oscilloscope point processor and time base integrated circuit\",\"authors\":\"E. Etheridge\",\"doi\":\"10.1109/CICC.1989.56737\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 100-MHz, 1.5-μm CMOS point processor/demultiplexer and time base integrated circuit has been developed for use in a digitizing oscilloscope. The component uses a single +5-V supply, accepts standard, negative ECL (emitter-coupled logic)-level inputs, and contains 46000 devices on a 311-mil×325-mil die. Those aspects of the design that comprise novel or improved circuitry or design techniques are described\",\"PeriodicalId\":165054,\"journal\":{\"name\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-05-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1989.56737\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1989.56737","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A CMOS 100 MHz digital oscilloscope point processor and time base integrated circuit
A 100-MHz, 1.5-μm CMOS point processor/demultiplexer and time base integrated circuit has been developed for use in a digitizing oscilloscope. The component uses a single +5-V supply, accepts standard, negative ECL (emitter-coupled logic)-level inputs, and contains 46000 devices on a 311-mil×325-mil die. Those aspects of the design that comprise novel or improved circuitry or design techniques are described
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