可编程逻辑集成电路上的组合随机数发生器

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引用次数: 0

摘要

本文展示了结合各种物理上不可克隆的功能,在现场可编程门阵列(FPGA)上实现随机数生成器的实际可能性。提出了一种紧凑、可扩展的基于d型异步触发器的数字随机数源方案,该方案结合了静态存储器物理不可克隆功能和环形振荡器物理不可克隆功能的特点。与现有的随机数生成器不同,该方案可用于解决数字设备的不可克隆识别问题。本文给出了基于Xilinx Zynq FPGA的产生电路的实验结果。描述了该方案生成的数字序列的主要运算模式、概率和统计特性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Combined Random Number Generator on Programmable Logic Integrated Circuits
The paper shows the practical possibility of implementing random number generators on field programmable gate arrays (FPGA) by combining various physically unclonable functions. A compact and scalable scheme of a digital random number source based on an asynchronous flip-flop of the D-type is proposed, which combines the characteristics of a static memory physically unclonable functions and a ring oscillator physically unclonable functions. Unlike existing random number generators, the proposed scheme can be used to solve the problem of unclonable identification of digital devices. The article presents experimental results obtained by the proposed generator circuit based on the FPGA Xilinx Zynq. The main modes of operation, probabilistic and statistical characteristics of numerical sequences, generated by the proposed scheme are described.
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