用于SoC应用的商用200 mm富阱HR-SOI晶圆的射频和线性性能

2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2013-03-28 DOI:10.1109/SIRF.2013.6489417

C. Neve, K. Ben Alia, C. Malaquin, F. Allibert, E. Desbonnets, I. Bertrand, W. Van Den Daele, J. Raskin

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引用次数: 17

摘要

我们首次提出了商用200毫米富陷阱的HR-SOI晶圆的射频和线性性能。这些晶圆完全符合CMOS工艺的热预算。在+15 dBm(即大于95 dBc)的900 MHz输入信号下，固定BOX厚度为400 nm的SOI晶圆的有效电阻率值高于4 kΩ-cm，谐波失真水平低于-81 dBm。我们的研究证实了富陷阱的HR-SOI晶圆在硅中集成射频系统的能力。

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RF and linear performance of commercial 200 mm trap-rich HR-SOI wafers for SoC applications

We present for the first time the RF and linear performance of commercial 200 mm trap-rich HR-SOI wafers. These wafers are fully compatible with the thermal budget of CMOS process. The investigated SOI wafers with a fixed BOX of 400 nm-thick show effective resistivity values higher than 4 kΩ-cm and harmonic distortion levels lower than -81 dBm for a 900 MHz input signal with +15 dBm, i.e. more than 95 dBc. Our investigations confirm the capability of trap-rich HR-SOI wafer for the integration of RF systems in Si.

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2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems

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