增强的晶圆覆盖残余控制:深度亚纳米,亚毫米横向分辨率

Yael Sufrin, P. Leray, E. Canga, Avi Cohen, V. Dmitriev, Kujan Gorhad
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引用次数: 0

摘要

在深紫外(DUV)光刻(litho)中引入先进技术节点,涉及多个光刻步骤,已经收紧了晶圆上产品覆盖规范[1]。行业趋势已经将覆盖层要求推向亚纳米级别(因此掩膜注册要求也会收紧)。在大多数情况下,晶圆产品上的叠加误差是场内(场内)和场间(场对场)误差的组合。给定的光刻层场内叠加误差包括几个系统源,如扫描仪透镜到透镜的残差和掩模写入器残差。随着节点和光刻技术的发展,在晶圆和掩膜侧,以高横向分辨率精确测量覆盖层的能力已经成功引入。扫描技术的最新发展提高了控制高阶曝光场内叠加的能力。然而,这仍然是在几毫米的横向分辨率控制能力处于最佳状态,留下的残余误差在亚毫米到几毫米的范围内,没有能力进一步抑制到目标规格,然而,不是亚纳米量级。在这项工作中,我们对蔡司最先进的掩模调谐解决方案ForTune ERC(增强型配准控制)进行了实证评估。该解决方案基于蔡司ForTune工具对掩模本体的激光加工。它允许将少量纳米覆盖残差(扫描仪后最好能做到的)抑制到深亚纳米,即使在亚毫米采样分辨率(x1晶圆级)和低到高的残差调制频率下也是如此。为了本研究的目的,我们使用双图像掩模在晶圆侧形成一个覆盖签名。在基于激光的掩模体调谐之前,已经暴露了两个晶圆;测量了晶圆叠加误差,并将其作为初始叠加问题。通过ERC模型和随后的掩模激光调谐解决问题后,对另外两个晶圆进行了第二次曝光。然后对前后晶圆进行比较,以检查晶圆侧覆盖层的改善情况。还收集了CD均匀性(CDU)数据,以确认CDU没有因ForTune ERC过程而下降。这种先进的场内控制方法与扫描仪的每次曝光高阶校正(CPE)相结合,提供了一种有效的协同优化解决方案,以严格控制DUV光刻中现有和未来节点的覆盖。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Enhanced wafer overlay residuals control: deep sub-nanometer at sub-millimeter lateral resolution
The introduction of advanced technology nodes in deep UV (DUV) lithography (litho), involving multiple litho steps, has tightened the wafer on-product overlay specifications [1]. The industry trend already pushes the overlay requirements to the sub-nanometer regime (and so the mask registration requirements tightens as well). In the most general view, wafer on-product overlay errors are a combination of intra-field (within field) and inter-field (field-to-field) errors. A given litho layer intra-field overlay error includes several systematic sources, such as scanner lens-to-lens residuals and mask writer residuals. Parallel to the nodes and litho techniques advancing, the ability to accurately measure overlay at high lateral resolution have being successfully introduced, both at wafer and mask side. The recent developments in scanner technology improved the ability to control intra-field overlay at high-order across the exposure field. However, this is still in several millimeter lateral resolution control ability at its best, leaving residual errors in the sub-millimeter to few millimeter regime without the ability to further suppress them to the target specification, nevertheless, not to the sub-nanometer magnitude. In this work, we have empirically evaluated the ZEISS state-of-the-art mask tuning solution named ForTune ERC (Enhanced Registration Control). This solution is based on laser processing of the mask bulk by the ZEISS ForTune tool. It allows to suppress few nanometer overlay residuals (post the scanner best-can-do) down to deep sub-nanometer, all even at sub-millimeter sampling resolution (x1 wafer level) and low-to-high residuals modulating frequency. For the sake of this study, we have used a dual-image mask to form one overlay signature at wafer side. Two wafers have been exposed prior to the laser-based tuning of the mask bulk; the wafers overlay error was measured and used as an initial overlay problem to begin with. A second exposure of two additional wafers was performed post the problem- solving by the ERC model and the consequent mask laser-based tuning. The pre/post wafers were then compared to examine the improvement in overlay at wafer side. CD uniformity (CDU) data has been collected as well, to confirm no degradation in CDU due to the ForTune ERC process. The combination of this advanced method of intra-field control with high-order correction per exposure (CPE) by the scanner, provides an efficient co-optimized solution to tightly control the overlay of existing and future nodes at DUV litho.
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