EDA路线图和未来VLSI设计技术的改进

T. Hiwatashi
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引用次数: 0

摘要

随着近年来半导体技术的飞速发展,预计到1999年,在0.18微米的技术下,可以在单片芯片上实现包括微处理器、存储器、逻辑电路和模拟模块在内的整个系统。在这种“系统LSI”或“片上系统”上,由于半导体工艺技术的创新,可以实现各种功能。为了设计一个“系统大规模集成电路”,每个模块都需要不同的设计和验证方法来获得最佳性能。这种情况开启了一个EDA技术发挥不可或缺作用的新时代。本课程是对EDA和设计技术活动的一般介绍。如“日本的路线图组织和活动”,“日本的EDA路线图”,“美日设计EDA能力的比较”和“VCDS:基于虚拟核心的设计系统”。“硬件/软件协同设计”的主题也作为嵌入式教程进行讨论。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
EDA Roadmap and Future VLSI Design Technology Enhancement
As the recent rapid progress in semiconductor technology, it is expected that a whole system including MPU, memories, logic circuits and analog blocks can be implemented on a single chip under 0.18 micron technology in 1999. On such a "System LSI" or "System On a Chip", various features can be realized due to the innovation of semiconductor process technologies. To design a "System LSI", different design and verification methodologies are required for each block to obtain an optimal performance. This situation introduces a new era when the EDA technologies play an indispensable role. This session is a general introduction to the EDA and design technology activities. Such as "Roadmap Organization and Activities in Japan", "EDA Roadmap in Japan", "A US/Japan Comparison of DesigdEDA Capabilities" and "VCDS: Virtual Core based Design System". The topic of "Hardware/Software CO-design" is also addressed as an embedded tutorial.
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