{"title":"GaAs MESFET大信号优值随工艺、材料、寄生和偏置参数的变化和灵敏度的模拟","authors":"D. Stoneking, R. Trew, L. Mukundan","doi":"10.1109/CORNEL.1989.79839","DOIUrl":null,"url":null,"abstract":"A simulator for calculating MESFET large-signal figures of merit and their sensitivities with respect to various device design, material and operational parameters has been developed. A study of an ion-implanted device with a 0.42- mu m gate length and 1.0-mm gate width is presented. The effects on maximum power-added efficiency, output power at the maximum power-added efficiency, and output power at 1-dB gain compression due to variation in implant peak doping density, implant range, implant straggle, gate length, gate width, and gate-drain breakdown voltage are presented. The data indicate that the device performance is most sensitive to changes in V/sub gdbd/ for values of V/sub gdbd/ less than 20 V. However, performance sensitivity goes to zero for V/sub gdbd/ greater than 20 V. RF performance is also sensitive to changes in the channel implant parameters. However, the simulated sensitivities are less than those for V/sub gdbd/. Over fairly broad ranges, device performance is less sensitive to changes in L/sub g/ and W/sub g/ but degrades rapidly at the extrema.<<ETX>>","PeriodicalId":445524,"journal":{"name":"Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits,","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Simulation of the variation and sensitivity of GaAs MESFET large signal figures-of-merit due to process, material, parasitic, and bias parameters\",\"authors\":\"D. Stoneking, R. Trew, L. Mukundan\",\"doi\":\"10.1109/CORNEL.1989.79839\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A simulator for calculating MESFET large-signal figures of merit and their sensitivities with respect to various device design, material and operational parameters has been developed. A study of an ion-implanted device with a 0.42- mu m gate length and 1.0-mm gate width is presented. The effects on maximum power-added efficiency, output power at the maximum power-added efficiency, and output power at 1-dB gain compression due to variation in implant peak doping density, implant range, implant straggle, gate length, gate width, and gate-drain breakdown voltage are presented. The data indicate that the device performance is most sensitive to changes in V/sub gdbd/ for values of V/sub gdbd/ less than 20 V. However, performance sensitivity goes to zero for V/sub gdbd/ greater than 20 V. RF performance is also sensitive to changes in the channel implant parameters. However, the simulated sensitivities are less than those for V/sub gdbd/. Over fairly broad ranges, device performance is less sensitive to changes in L/sub g/ and W/sub g/ but degrades rapidly at the extrema.<<ETX>>\",\"PeriodicalId\":445524,\"journal\":{\"name\":\"Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits,\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits,\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CORNEL.1989.79839\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits,","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CORNEL.1989.79839","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Simulation of the variation and sensitivity of GaAs MESFET large signal figures-of-merit due to process, material, parasitic, and bias parameters
A simulator for calculating MESFET large-signal figures of merit and their sensitivities with respect to various device design, material and operational parameters has been developed. A study of an ion-implanted device with a 0.42- mu m gate length and 1.0-mm gate width is presented. The effects on maximum power-added efficiency, output power at the maximum power-added efficiency, and output power at 1-dB gain compression due to variation in implant peak doping density, implant range, implant straggle, gate length, gate width, and gate-drain breakdown voltage are presented. The data indicate that the device performance is most sensitive to changes in V/sub gdbd/ for values of V/sub gdbd/ less than 20 V. However, performance sensitivity goes to zero for V/sub gdbd/ greater than 20 V. RF performance is also sensitive to changes in the channel implant parameters. However, the simulated sensitivities are less than those for V/sub gdbd/. Over fairly broad ranges, device performance is less sensitive to changes in L/sub g/ and W/sub g/ but degrades rapidly at the extrema.<>