{"title":"移动计算SOC的原型IP","authors":"Limin Liu","doi":"10.1109/HSI.2008.4581402","DOIUrl":null,"url":null,"abstract":"SOC, system on a chip, is an advanced organization of embedded systems. A mobile computing SOC is to integrate a mobile computing control or monitor system into one IC chip. It can supply some functions, which support to handle some business in moving. With a mobile computing SOC, the system will be smaller, reliable, efficient, and consume less power. It can make the life be easier and more convenient. This paper is focused on the customized design technology of IP cores based on FPGA for a mobile computing SOC. In order to take a better operation efficiency and performance, the operation of the IP core can be driven by an embedded MP with single instruction. As an example, the FPGA hardware design for an external RAM controller is introduced in this paper. Results of simulation and test show the design is successful.","PeriodicalId":139846,"journal":{"name":"2008 Conference on Human System Interactions","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A prototyping IP for mobile computing SOC\",\"authors\":\"Limin Liu\",\"doi\":\"10.1109/HSI.2008.4581402\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"SOC, system on a chip, is an advanced organization of embedded systems. A mobile computing SOC is to integrate a mobile computing control or monitor system into one IC chip. It can supply some functions, which support to handle some business in moving. With a mobile computing SOC, the system will be smaller, reliable, efficient, and consume less power. It can make the life be easier and more convenient. This paper is focused on the customized design technology of IP cores based on FPGA for a mobile computing SOC. In order to take a better operation efficiency and performance, the operation of the IP core can be driven by an embedded MP with single instruction. As an example, the FPGA hardware design for an external RAM controller is introduced in this paper. Results of simulation and test show the design is successful.\",\"PeriodicalId\":139846,\"journal\":{\"name\":\"2008 Conference on Human System Interactions\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-05-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 Conference on Human System Interactions\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HSI.2008.4581402\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 Conference on Human System Interactions","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HSI.2008.4581402","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
SOC, system on a chip, is an advanced organization of embedded systems. A mobile computing SOC is to integrate a mobile computing control or monitor system into one IC chip. It can supply some functions, which support to handle some business in moving. With a mobile computing SOC, the system will be smaller, reliable, efficient, and consume less power. It can make the life be easier and more convenient. This paper is focused on the customized design technology of IP cores based on FPGA for a mobile computing SOC. In order to take a better operation efficiency and performance, the operation of the IP core can be driven by an embedded MP with single instruction. As an example, the FPGA hardware design for an external RAM controller is introduced in this paper. Results of simulation and test show the design is successful.