半导体封装中无空洞焊接工艺的真空回流工艺表征

2018 IEEE 38th International Electronics Manufacturing Technology Conference (IEMT) Pub Date : 2018-09-01 DOI:10.1109/IEMT.2018.8511767

Siang Miang Yeo, Azman Mahmood, Shahrul Haizal Ishak

{"title":"半导体封装中无空洞焊接工艺的真空回流工艺表征","authors":"Siang Miang Yeo, Azman Mahmood, Shahrul Haizal Ishak","doi":"10.1109/IEMT.2018.8511767","DOIUrl":null,"url":null,"abstract":"Semiconductor packaging's solder void criteria is getting tighter overtime due to involvement of high usage in automotive industry. Semiconductor packaging component maker starts to strengthen the solder joint quality and electrical power conductivity by tighten the solder void requirement through seeking a solution in controlling the maximum solder void size reduction from 10-15% original fraction to 5% or below over die size. Vacuum reflow is introduced to overcome this challenge. Critical process parameters in vacuum reflow process including temperature and pressure were characterized for void reduction and compared to that of conventional reflow process. Promising results show that high temperature, fast depressurize rate and long pressure dwell time in low pressurized environment as well as solder paste volume increment are critical factors in providing minimum solder void sizes that successfully meet the new industry criteria.","PeriodicalId":292144,"journal":{"name":"2018 IEEE 38th International Electronics Manufacturing Technology Conference (IEMT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Vacuum Reflow Process Characterization for Void-Less Soldering Process in Semiconductor Package\",\"authors\":\"Siang Miang Yeo, Azman Mahmood, Shahrul Haizal Ishak\",\"doi\":\"10.1109/IEMT.2018.8511767\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Semiconductor packaging's solder void criteria is getting tighter overtime due to involvement of high usage in automotive industry. Semiconductor packaging component maker starts to strengthen the solder joint quality and electrical power conductivity by tighten the solder void requirement through seeking a solution in controlling the maximum solder void size reduction from 10-15% original fraction to 5% or below over die size. Vacuum reflow is introduced to overcome this challenge. Critical process parameters in vacuum reflow process including temperature and pressure were characterized for void reduction and compared to that of conventional reflow process. Promising results show that high temperature, fast depressurize rate and long pressure dwell time in low pressurized environment as well as solder paste volume increment are critical factors in providing minimum solder void sizes that successfully meet the new industry criteria.\",\"PeriodicalId\":292144,\"journal\":{\"name\":\"2018 IEEE 38th International Electronics Manufacturing Technology Conference (IEMT)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE 38th International Electronics Manufacturing Technology Conference (IEMT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.2018.8511767\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 38th International Electronics Manufacturing Technology Conference (IEMT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.2018.8511767","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 10

摘要

由于半导体封装在汽车行业的高使用率，其焊点空洞标准越来越严格。半导体封装元件制造商开始通过收紧焊点空隙要求来加强焊点质量和电导率，寻求将最大焊点空隙尺寸从原来的10-15%减小到比晶片尺寸小5%或更小的解决方案。为了克服这一挑战，引入了真空回流。对真空回流工艺的温度和压力等关键工艺参数进行了表征，并与常规回流工艺进行了比较。有希望的结果表明，高温、快速的减压速率、低压力环境下的长压力停留时间以及锡膏体积的增加是提供成功满足新行业标准的最小焊点空洞尺寸的关键因素。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Vacuum Reflow Process Characterization for Void-Less Soldering Process in Semiconductor Package

Semiconductor packaging's solder void criteria is getting tighter overtime due to involvement of high usage in automotive industry. Semiconductor packaging component maker starts to strengthen the solder joint quality and electrical power conductivity by tighten the solder void requirement through seeking a solution in controlling the maximum solder void size reduction from 10-15% original fraction to 5% or below over die size. Vacuum reflow is introduced to overcome this challenge. Critical process parameters in vacuum reflow process including temperature and pressure were characterized for void reduction and compared to that of conventional reflow process. Promising results show that high temperature, fast depressurize rate and long pressure dwell time in low pressurized environment as well as solder paste volume increment are critical factors in providing minimum solder void sizes that successfully meet the new industry criteria.

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来源期刊

2018 IEEE 38th International Electronics Manufacturing Technology Conference (IEMT)

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