J. Sharma, Yul Koh, Sagnik Ghosh, Han Xuan Wong, L. Joshua
{"title":"用于提高MEMS/NEMS器件成品率的在线测试结构","authors":"J. Sharma, Yul Koh, Sagnik Ghosh, Han Xuan Wong, L. Joshua","doi":"10.1109/EPTC56328.2022.10013245","DOIUrl":null,"url":null,"abstract":"The integration of novel process flows for the fabrication of microelectromechanical system (MEMS) and nanoelectromechanical system (NEMS) devices invariably requires an initial round of short loops to qualify the critical process steps prior to full device fabrication. This paper presents some of the initial short loop based in-line qualification results obtained during the fabrication of zero-power wake-up acceleration switches fabricated on silicon-on-insulator (SOI) wafers with 1µm buried oxide (BOX) for a range of active silicon thicknesses. Narrow trench openings in the silicon device layer is a common requirements in the fabrication of MEMS and NEMS devices in SOI. Isolation across narrow gaps was verified in-line through electrical measurements, corroborated by cross-sectional inspections from scanning electron micrographs (SEM). Similarly, the release of MEMS structures by vapor hydrofluoric acid (VHF) was verified by in-line infrared (IR) inspection metrology tool after removing the metal from the test structures to be inspected. These test structures for in-line metrology inspection help shorten the fabrication time and improve the yield of the final fabricated device.","PeriodicalId":163034,"journal":{"name":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","volume":"77 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"In-line test structures for yield improvement in MEMS/NEMS device\",\"authors\":\"J. Sharma, Yul Koh, Sagnik Ghosh, Han Xuan Wong, L. Joshua\",\"doi\":\"10.1109/EPTC56328.2022.10013245\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The integration of novel process flows for the fabrication of microelectromechanical system (MEMS) and nanoelectromechanical system (NEMS) devices invariably requires an initial round of short loops to qualify the critical process steps prior to full device fabrication. This paper presents some of the initial short loop based in-line qualification results obtained during the fabrication of zero-power wake-up acceleration switches fabricated on silicon-on-insulator (SOI) wafers with 1µm buried oxide (BOX) for a range of active silicon thicknesses. Narrow trench openings in the silicon device layer is a common requirements in the fabrication of MEMS and NEMS devices in SOI. Isolation across narrow gaps was verified in-line through electrical measurements, corroborated by cross-sectional inspections from scanning electron micrographs (SEM). Similarly, the release of MEMS structures by vapor hydrofluoric acid (VHF) was verified by in-line infrared (IR) inspection metrology tool after removing the metal from the test structures to be inspected. These test structures for in-line metrology inspection help shorten the fabrication time and improve the yield of the final fabricated device.\",\"PeriodicalId\":163034,\"journal\":{\"name\":\"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)\",\"volume\":\"77 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-12-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPTC56328.2022.10013245\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC56328.2022.10013245","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In-line test structures for yield improvement in MEMS/NEMS device
The integration of novel process flows for the fabrication of microelectromechanical system (MEMS) and nanoelectromechanical system (NEMS) devices invariably requires an initial round of short loops to qualify the critical process steps prior to full device fabrication. This paper presents some of the initial short loop based in-line qualification results obtained during the fabrication of zero-power wake-up acceleration switches fabricated on silicon-on-insulator (SOI) wafers with 1µm buried oxide (BOX) for a range of active silicon thicknesses. Narrow trench openings in the silicon device layer is a common requirements in the fabrication of MEMS and NEMS devices in SOI. Isolation across narrow gaps was verified in-line through electrical measurements, corroborated by cross-sectional inspections from scanning electron micrographs (SEM). Similarly, the release of MEMS structures by vapor hydrofluoric acid (VHF) was verified by in-line infrared (IR) inspection metrology tool after removing the metal from the test structures to be inspected. These test structures for in-line metrology inspection help shorten the fabrication time and improve the yield of the final fabricated device.