CSST: An Efficient Secure Split-Test for Preventing IC Piracy

With the high costs associated with modern IC fabrication, most semiconductor companies have gone fabless, i.e., they outsource manufacturing of their designs to contract foundries. This horizontal business model has led to many well documented issues associated with untrusted foundries including IC overproduction and shipping improperly or insufficiently tested chips. Entering such chips in the supply chain can be catastrophic for critical applications. We propose a new Secure Split-Test to give control over testing back to the IP owner. Each chip is locked during test. The IP owner is the only entity who can interpret the locked test results and unlock passing chips. In this way, SST can prevent shipping overproduction and defective chips from reaching the supply chain. The proposed method considerably simplifies the communication required between the foundry and IP owner compared to the original version of the secure split test. The results demonstrate that our new technique is more secure than the original and with less communication barriers.