{"title":"与IDDq测试相比,I-V测试的有效性[IC测试]","authors":"T. Vogels","doi":"10.1109/VTEST.2003.1197632","DOIUrl":null,"url":null,"abstract":"This paper contrasts the novel I-V test criteria with traditional and recent IDDq test methods and compares their test effectiveness. It shows how I-V tests and IDDq tests fare in discriminating between \"good\" and \"bad\" dies and how test limits can be set empirically, especially for I-V testing. All results are based on data from an (internal) IBM experiment that was based on a large ASIC manufactured in a 0.18 /spl mu/m-L/sub eff/ technology.","PeriodicalId":292996,"journal":{"name":"Proceedings. 21st VLSI Test Symposium, 2003.","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Effectiveness of I-V testing in comparison to IDDq tests [IC testing]\",\"authors\":\"T. Vogels\",\"doi\":\"10.1109/VTEST.2003.1197632\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper contrasts the novel I-V test criteria with traditional and recent IDDq test methods and compares their test effectiveness. It shows how I-V tests and IDDq tests fare in discriminating between \\\"good\\\" and \\\"bad\\\" dies and how test limits can be set empirically, especially for I-V testing. All results are based on data from an (internal) IBM experiment that was based on a large ASIC manufactured in a 0.18 /spl mu/m-L/sub eff/ technology.\",\"PeriodicalId\":292996,\"journal\":{\"name\":\"Proceedings. 21st VLSI Test Symposium, 2003.\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-04-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. 21st VLSI Test Symposium, 2003.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTEST.2003.1197632\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 21st VLSI Test Symposium, 2003.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTEST.2003.1197632","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Effectiveness of I-V testing in comparison to IDDq tests [IC testing]
This paper contrasts the novel I-V test criteria with traditional and recent IDDq test methods and compares their test effectiveness. It shows how I-V tests and IDDq tests fare in discriminating between "good" and "bad" dies and how test limits can be set empirically, especially for I-V testing. All results are based on data from an (internal) IBM experiment that was based on a large ASIC manufactured in a 0.18 /spl mu/m-L/sub eff/ technology.