工作频率为70-110 GHz的InP/Si BICMOS有源双平衡下变频混频器

J. Mccue, M. Casto, J. Li, P. Watson, W. Khalil
{"title":"工作频率为70-110 GHz的InP/Si BICMOS有源双平衡下变频混频器","authors":"J. Mccue, M. Casto, J. Li, P. Watson, W. Khalil","doi":"10.1109/CSICS.2014.6978540","DOIUrl":null,"url":null,"abstract":"In this paper, a double-balanced Gilbert cell down-conversion mixer is demonstrated from 70-110 GHz. The wide bandwidth and high frequency are enabled by the HRL InP/Si BiCMOS process. With an fT of 300 GHz, the available 0.25 μm InP HBTs are used in the signal path while the 90 nm CMOS devices are used for biasing and gain adjustment. The fully differential circuit is implemented using two on-chip Marchand baluns feeding both the LO and RF ports. An IF buffer follows the mixer to improve matching and signal quality for testing. After de-embedding the balun and IF buffer, the mixer core achieves a peak conversion gain of 13 dB, a minimum DSB NF of 10 dB, and an OP1dB of -2 dBm while consuming 5 mA from a 3.3 V supply.","PeriodicalId":309722,"journal":{"name":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2014-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"An Active Double-Balanced Down-Conversion Mixer in InP/Si BICMOS Operating from 70-110 GHz\",\"authors\":\"J. Mccue, M. Casto, J. Li, P. Watson, W. Khalil\",\"doi\":\"10.1109/CSICS.2014.6978540\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a double-balanced Gilbert cell down-conversion mixer is demonstrated from 70-110 GHz. The wide bandwidth and high frequency are enabled by the HRL InP/Si BiCMOS process. With an fT of 300 GHz, the available 0.25 μm InP HBTs are used in the signal path while the 90 nm CMOS devices are used for biasing and gain adjustment. The fully differential circuit is implemented using two on-chip Marchand baluns feeding both the LO and RF ports. An IF buffer follows the mixer to improve matching and signal quality for testing. After de-embedding the balun and IF buffer, the mixer core achieves a peak conversion gain of 13 dB, a minimum DSB NF of 10 dB, and an OP1dB of -2 dBm while consuming 5 mA from a 3.3 V supply.\",\"PeriodicalId\":309722,\"journal\":{\"name\":\"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-12-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSICS.2014.6978540\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSICS.2014.6978540","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

摘要

本文演示了一种双平衡吉尔伯特单元下变频混频器,工作频率为70-110 GHz。采用HRL InP/Si BiCMOS工艺实现宽带和高频。在fT为300 GHz的情况下,可用的0.25 μm InP hbt用于信号通路,而90 nm CMOS器件用于偏置和增益调节。全差分电路使用两个片上马尔尚平衡器为LO和RF端口供电。中频缓冲器跟随混频器,以改善匹配和测试信号质量。在去嵌入平衡器和中频缓冲器后,混频器核心实现了13 dB的峰值转换增益,最小DSB NF为10 dB, OP1dB为-2 dBm,同时从3.3 V电源消耗5 mA。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An Active Double-Balanced Down-Conversion Mixer in InP/Si BICMOS Operating from 70-110 GHz
In this paper, a double-balanced Gilbert cell down-conversion mixer is demonstrated from 70-110 GHz. The wide bandwidth and high frequency are enabled by the HRL InP/Si BiCMOS process. With an fT of 300 GHz, the available 0.25 μm InP HBTs are used in the signal path while the 90 nm CMOS devices are used for biasing and gain adjustment. The fully differential circuit is implemented using two on-chip Marchand baluns feeding both the LO and RF ports. An IF buffer follows the mixer to improve matching and signal quality for testing. After de-embedding the balun and IF buffer, the mixer core achieves a peak conversion gain of 13 dB, a minimum DSB NF of 10 dB, and an OP1dB of -2 dBm while consuming 5 mA from a 3.3 V supply.
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