M. Funaki, T. Shimizu, S. Orihara, H. kawanaka, M. Kurihara, H. Sato, N. Katsumata, M. Oikawa, J. Higuchi, K. Oe, R. Kuga, K. Maki, T. Nishibata
{"title":"新的全局快门CMOS成像仪,每像素2个晶体管","authors":"M. Funaki, T. Shimizu, S. Orihara, H. kawanaka, M. Kurihara, H. Sato, N. Katsumata, M. Oikawa, J. Higuchi, K. Oe, R. Kuga, K. Maki, T. Nishibata","doi":"10.1109/VLSIT.2008.4588616","DOIUrl":null,"url":null,"abstract":"We present a new global shutter CMOS imager with 2 transistors per pixel. The first transistor is a ring gate transistor for accumulating holes that modulate threshold voltage. The second one is a transfer gate transistor that transfers holes from a PD to the ring gate transistor at the same time in all pixels. Simple structure allows us to realize 5.4 um pixel pitch, kTC noise free, and global shutter sensor using 0.35 um technology.","PeriodicalId":173781,"journal":{"name":"2008 Symposium on VLSI Technology","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-06-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"New global shutter CMOS imager with 2 transistors per pixel\",\"authors\":\"M. Funaki, T. Shimizu, S. Orihara, H. kawanaka, M. Kurihara, H. Sato, N. Katsumata, M. Oikawa, J. Higuchi, K. Oe, R. Kuga, K. Maki, T. Nishibata\",\"doi\":\"10.1109/VLSIT.2008.4588616\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present a new global shutter CMOS imager with 2 transistors per pixel. The first transistor is a ring gate transistor for accumulating holes that modulate threshold voltage. The second one is a transfer gate transistor that transfers holes from a PD to the ring gate transistor at the same time in all pixels. Simple structure allows us to realize 5.4 um pixel pitch, kTC noise free, and global shutter sensor using 0.35 um technology.\",\"PeriodicalId\":173781,\"journal\":{\"name\":\"2008 Symposium on VLSI Technology\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-06-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 Symposium on VLSI Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2008.4588616\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2008.4588616","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
New global shutter CMOS imager with 2 transistors per pixel
We present a new global shutter CMOS imager with 2 transistors per pixel. The first transistor is a ring gate transistor for accumulating holes that modulate threshold voltage. The second one is a transfer gate transistor that transfers holes from a PD to the ring gate transistor at the same time in all pixels. Simple structure allows us to realize 5.4 um pixel pitch, kTC noise free, and global shutter sensor using 0.35 um technology.