Systematic Analysis, Design and Optimization of On-Chip Spiral Inductor for Si based RFIC's

The figure of merit of an on-chip spiral inductor is given by its quality factor (g), self resonance frequency (fres) and optimum frequency (fmax). This paper presents a systematic analysis of the tradeoffs of the figure of merits with the layout parameters associated with the spiral inductor. The width of the metal trace of the spiral must be decided based on the desired operating frequency and the number of turns must be chosen considering the trade off between the quality factor and the area to minimize the cost. An efficient method to determine the optimum layout parameters for any inductance value that results the highest quality factor possible in a given technology is proposed. The proposed method solves the design complexity by deciding these performance controlling parameters based on a lumped physical model