{"title":"32纳米及以上节点浮动体内存(FBRAM)技术概述及未来挑战","authors":"T. Hamamoto, T. Ohsawa","doi":"10.1109/ESSDERC.2008.4681692","DOIUrl":null,"url":null,"abstract":"Floating body cell (FBC) is a one-transistor memory cell on SOI substrate, which aims high density embedded memory on SOC. In order to verify this memory cell technology, a 128 Mb floating body RAM (FBRAM) with FBC has been designed and successfully developed. The memory cell design and the experimental results, including single cell (1Cell/Bit) operation, are reviewed. Based on the experimental results, the scalability of FBC is also discussed.","PeriodicalId":121088,"journal":{"name":"ESSDERC 2008 - 38th European Solid-State Device Research Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Overview and future challenges of Floating Body RAM (FBRAM) technology for 32nm technology node and beyond\",\"authors\":\"T. Hamamoto, T. Ohsawa\",\"doi\":\"10.1109/ESSDERC.2008.4681692\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Floating body cell (FBC) is a one-transistor memory cell on SOI substrate, which aims high density embedded memory on SOC. In order to verify this memory cell technology, a 128 Mb floating body RAM (FBRAM) with FBC has been designed and successfully developed. The memory cell design and the experimental results, including single cell (1Cell/Bit) operation, are reviewed. Based on the experimental results, the scalability of FBC is also discussed.\",\"PeriodicalId\":121088,\"journal\":{\"name\":\"ESSDERC 2008 - 38th European Solid-State Device Research Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-11-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSDERC 2008 - 38th European Solid-State Device Research Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSDERC.2008.4681692\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSDERC 2008 - 38th European Solid-State Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDERC.2008.4681692","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Overview and future challenges of Floating Body RAM (FBRAM) technology for 32nm technology node and beyond
Floating body cell (FBC) is a one-transistor memory cell on SOI substrate, which aims high density embedded memory on SOC. In order to verify this memory cell technology, a 128 Mb floating body RAM (FBRAM) with FBC has been designed and successfully developed. The memory cell design and the experimental results, including single cell (1Cell/Bit) operation, are reviewed. Based on the experimental results, the scalability of FBC is also discussed.