基于VHDL的UART串行通信模块设计与仿真

Yi-yuan Fang, Xue-jun Chen
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引用次数: 116

摘要

UART(通用异步收发器)是一种串行通信协议;主要用于计算机与外设之间的短距离、低速、低成本的数据交换。在实际的工业生产中,有时我们并不需要UART的全部功能,而只是简单地集成其核心部分。UART包括波特率产生器、接收器和发送器三个核心模块。用VHDL语言实现的UART可以集成到FPGA中,实现紧凑、稳定、可靠的数据传输。这对SOC的设计具有重要意义。Quartus II的仿真结果与UART协议完全一致。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design and Simulation of UART Serial Communication Module Based on VHDL
UART (Universal Asynchronous Receiver Transmitter) is a kind of serial communication protocol; mostly used for short-distance, low speed, low-cost data exchange between computer and peripherals. During the actual industrial production, sometimes we do not need the full functionality of UART, but simply integrate its core part. UART includes three kernel modules which are the baud rate generator, receiver and transmitter. The UART implemented with VHDL language can be integrated into the FPGA to achieve compact, stable and reliable data transmission. It's significant for the design of SOC. The simulation results with Quartus II are completely consistent with the UART protocol.
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