{"title":"用于片上电源谐振阻尼的开关去耦电容电路","authors":"J. Gu, Hanyong Eom, C. Kim","doi":"10.1109/VLSIC.2007.4342684","DOIUrl":null,"url":null,"abstract":"A low power switched decoupling capacitor circuit is proposed to suppress on-chip resonant supply noise. Compared to previous analog techniques, the proposed digital implementation achieves a 9X reduction in quiescent power with improved tolerance to PVT variation and tuning capability for optimal switching threshold. Measurements from a 0.13 mum test chip show an 11X boost in effective decap value and a 9.8 dB suppression in resonant supply noise by using the proposed circuit.","PeriodicalId":261092,"journal":{"name":"2007 IEEE Symposium on VLSI Circuits","volume":"133 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":"{\"title\":\"A Switched Decoupling Capacitor Circuit for On-Chip Supply Resonance Damping\",\"authors\":\"J. Gu, Hanyong Eom, C. Kim\",\"doi\":\"10.1109/VLSIC.2007.4342684\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low power switched decoupling capacitor circuit is proposed to suppress on-chip resonant supply noise. Compared to previous analog techniques, the proposed digital implementation achieves a 9X reduction in quiescent power with improved tolerance to PVT variation and tuning capability for optimal switching threshold. Measurements from a 0.13 mum test chip show an 11X boost in effective decap value and a 9.8 dB suppression in resonant supply noise by using the proposed circuit.\",\"PeriodicalId\":261092,\"journal\":{\"name\":\"2007 IEEE Symposium on VLSI Circuits\",\"volume\":\"133 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-06-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"24\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Symposium on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2007.4342684\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2007.4342684","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Switched Decoupling Capacitor Circuit for On-Chip Supply Resonance Damping
A low power switched decoupling capacitor circuit is proposed to suppress on-chip resonant supply noise. Compared to previous analog techniques, the proposed digital implementation achieves a 9X reduction in quiescent power with improved tolerance to PVT variation and tuning capability for optimal switching threshold. Measurements from a 0.13 mum test chip show an 11X boost in effective decap value and a 9.8 dB suppression in resonant supply noise by using the proposed circuit.
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