{"title":"实时逻辑的图形证明程序","authors":"Jung-Hong Kao, L. Henschen","doi":"10.1109/SEKE.1992.227975","DOIUrl":null,"url":null,"abstract":"Real-time logic (RTL) has been successful in specifying and verifying a class of timing requirements in real-time systems. The authors propose a graph proof procedure for RTL formulae. First, they represent the RTL formulae in a connection graph-like structure. Based on this graph, they have found some useful deduction rules and reduction rules. From some preliminary experiments, they show that their proof procedure is very efficient.<<ETX>>","PeriodicalId":191866,"journal":{"name":"Proceedings Fourth International Conference on Software Engineering and Knowledge Engineering","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A graph proof procedure for real time logic\",\"authors\":\"Jung-Hong Kao, L. Henschen\",\"doi\":\"10.1109/SEKE.1992.227975\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Real-time logic (RTL) has been successful in specifying and verifying a class of timing requirements in real-time systems. The authors propose a graph proof procedure for RTL formulae. First, they represent the RTL formulae in a connection graph-like structure. Based on this graph, they have found some useful deduction rules and reduction rules. From some preliminary experiments, they show that their proof procedure is very efficient.<<ETX>>\",\"PeriodicalId\":191866,\"journal\":{\"name\":\"Proceedings Fourth International Conference on Software Engineering and Knowledge Engineering\",\"volume\":\"8 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Fourth International Conference on Software Engineering and Knowledge Engineering\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SEKE.1992.227975\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Fourth International Conference on Software Engineering and Knowledge Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SEKE.1992.227975","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Real-time logic (RTL) has been successful in specifying and verifying a class of timing requirements in real-time systems. The authors propose a graph proof procedure for RTL formulae. First, they represent the RTL formulae in a connection graph-like structure. Based on this graph, they have found some useful deduction rules and reduction rules. From some preliminary experiments, they show that their proof procedure is very efficient.<>