基于FLASH-SRAM存储器的图像处理FPGA结构

Gonzalo-Elias Blanco-Silva, J. Vargas-Soto, M. Aceves-Fernández, J. Ramos-Arreguín
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引用次数: 0

摘要

嵌入式技术及其在工业和研究领域的应用日益广泛。一个重要的应用是图像处理,但这些过程需要大量的资源和计算时间。本文介绍了一种基于FPGA技术的数字图像处理系统。图像从PC机通过RS232接口发送到数字系统,并记录在FLASH存储器上。一旦图像被存储,图像就被转换到RAM存储器来执行该过程,并且处理后的图像可以显示在VGA接口中。所提出的体系结构是标准的VHDL来设计硬件描述。所开发的架构可以在任何FPGA平台上进行最小的调整。用640×480像素的图像对该结构进行了测试,并将结果与Mat lab软件进行了比较。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
FPGA Architecture for Image Processing Based on FLASH-SRAM Memory
The embedded technology and its applications are growing in the industry and research areas. An important application is the image processing, but these process requires a lot of resources and computing time. This paper presents a digital system for image processing, using FPGA technology. The image is send from PC to the digital system through RS232 interface, and the image is recorded on a FLASH memory. Once the image is stored, the image is translated to RAM memory to execute the process and the image processed can be displayed in a VGA interface. The proposed architecture is standard VHDL to design the hardware description. The architecture developed can be adjusted to be used on any FPGA platform with minimum changes. The architecture is tested with an image of 640×480 pixels and the results are compared with the Mat lab software.
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