S. Wong, U. Chio, Hou-Lon Choi, Chi-Hang Chan, Sai-Weng Sin, S. U, R. Martins
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A power effective 5-bit 600 MS/s binary-search ADC with simplified switching
This paper proposes the design of a binary search ADC that uses two different techniques, namely, distributed-residue and folding. These can prevent signal dependent offset and reduce the switching network complexity. A 5-bit binary-search ADC applying such proposed techniques has been developed in 65 nm CMOS. It consumes 540 µW under 1V supply voltage at the operating frequency of 600 MS/s. The simulation results demonstrate that the design achieves a SNDR of 30.8 dB at Nyquist input frequency with a figure of merit (FOM) of 32 fJ/conversion-step.
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