CMOS采样保持电路采用电流输送模拟开关

Thanat Nonthaputha, M. Kumngern, S. Lerkvaranyu
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引用次数: 1

摘要

本文提出了一种采用二代电流输送器(CCII)、电阻和电容构成的新型CMOS采样保持电路。与传统的S/H电路不同,所提出的S/H电路不存在于MOS开关中。本文提出的S/H电路采用CCII作为模拟开关(CCAS),可以实现高速开关的通断状态,无需缓冲电路。开关的通断状态由偏置电流控制。该偏置电流是用于对输入信号进行采样的采样脉冲。所提出的S/H电路适用于低功耗、高精度的信号处理应用。仿真结果验证了所提电路的可操作性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
CMOS sample-and-hold circuit using current conveyor analogue switch
This paper presents a new CMOS sample-and-hold (S/H) circuit employing one second-generation current conveyor (CCII), one resistor and one capacitor. Unlike, conventional S/H circuits, the proposed S/H circuit is absent from MOS switches. The proposed S/H circuit uses CCII to work as analog switch (CCAS) which high speed on-off status of switch and without buffer circuit can be obtained. The status on-off of switch is controlled by bias current. This bias current is sampling pulse that used for sampling input signal. The proposed S/H circuit is suitable for low-power and high accuracy for signal processing applications. The simulation results are used to confirm the workability of the proposed circuit.
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