Statistical methods for measurement reduction in semiconductor manufacturing

Measurement reduction in wafer fabrication represents a significant opportunity for cost reduction and improvement in operational efficiency. This translates into savings on test wafers, metrology equipment, technician time and throughput time. With ever-increasing process complexities and moves to 300 mm technology, measurement costs are increasingly becoming an area of focus to improve manufacturing efficiency. At Intel, statistical methodologies and management systems were developed to facilitate the reduction of measurements to reduce measurement costs.