短路加固1.2 kV SiC MOSFET非线性介电栅堆叠

M. Boccarossa, L. Maresca, A. Borghese, M. Riccio, G. Breglio, A. Irace, G. Salvatore
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引用次数: 0

摘要

在本文中,TCAD模拟提供了非线性介质栅极叠加对碳化硅功率mosfet短路性能的影响。特别地,常规栅氧化物被由二氧化硅和介电常数随温度变化的非线性电介质形成的堆栈所取代,以抵消由于温度引起的阈值电压的降低。仿真结果表明,由于该器件在短路事件中产生的最高温度降低,该器件具有更高的抗短路性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Short-Circuit Rugged 1.2 kV SiC MOSFET with a Non-Linear Dielectric Gate Stack
In this paper, TCAD simulations provide insights on the effect of a non-linear dielectric gate stack on the short-circuit performance of silicon carbide (SiC) power MOSFETs. In particular, the regular gate oxide was replaced by a stack formed by silicon dioxide and a non-linear dielectric whose permittivity varies with temperature, in order to counterbalance the reduction of the threshold voltage due to temperature. Simulations show that the presented device has a higher ruggedness to short-circuit events, thanks to the reduction of the maximum temperature arising in the device during those events.
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