{"title":"基于FPGA的TSIP接口驱动程序设计与实现","authors":"Hao Chen, Zhibin Zeng","doi":"10.1109/ITNEC48623.2020.9085040","DOIUrl":null,"url":null,"abstract":"TSIP is a multi-link serial interface suitable for providing external data transmission for multi-core DSPs. Based on the in-depth research on the TSIP interface protocol standard, this paper uses TMS320C66778 multi-core DSP as an example to design and implement the TSIP protocol interface driver between FPGA and DSP. The front end of the system is a preprocessing module implemented by FPGA, which processes the incoming sampling data from external A / D to make it meet the requirements of TSIP link transmission. The back-end DSP program mainly implements the interface function of TSIP. Provides low-latency, high-reliability data transmission for DSP signal processing.","PeriodicalId":235524,"journal":{"name":"2020 IEEE 4th Information Technology, Networking, Electronic and Automation Control Conference (ITNEC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design and Implementation of TSIP Interface Driver Based on FPGA\",\"authors\":\"Hao Chen, Zhibin Zeng\",\"doi\":\"10.1109/ITNEC48623.2020.9085040\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"TSIP is a multi-link serial interface suitable for providing external data transmission for multi-core DSPs. Based on the in-depth research on the TSIP interface protocol standard, this paper uses TMS320C66778 multi-core DSP as an example to design and implement the TSIP protocol interface driver between FPGA and DSP. The front end of the system is a preprocessing module implemented by FPGA, which processes the incoming sampling data from external A / D to make it meet the requirements of TSIP link transmission. The back-end DSP program mainly implements the interface function of TSIP. Provides low-latency, high-reliability data transmission for DSP signal processing.\",\"PeriodicalId\":235524,\"journal\":{\"name\":\"2020 IEEE 4th Information Technology, Networking, Electronic and Automation Control Conference (ITNEC)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 4th Information Technology, Networking, Electronic and Automation Control Conference (ITNEC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ITNEC48623.2020.9085040\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 4th Information Technology, Networking, Electronic and Automation Control Conference (ITNEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ITNEC48623.2020.9085040","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and Implementation of TSIP Interface Driver Based on FPGA
TSIP is a multi-link serial interface suitable for providing external data transmission for multi-core DSPs. Based on the in-depth research on the TSIP interface protocol standard, this paper uses TMS320C66778 multi-core DSP as an example to design and implement the TSIP protocol interface driver between FPGA and DSP. The front end of the system is a preprocessing module implemented by FPGA, which processes the incoming sampling data from external A / D to make it meet the requirements of TSIP link transmission. The back-end DSP program mainly implements the interface function of TSIP. Provides low-latency, high-reliability data transmission for DSP signal processing.