Leveraging nonvolatility for architecture design with emerging NVM

Emerging nonvolatile memory (NVM), such as spin-transfer torque magnetic Memory (STT-RAM), phase-change memory (PCM), and resistive memory (ReRAM), are widely expected to become the next generation cache and main memory, in order to migrate the “power wall” and overcome the DRAM stability challenge. Previous effort has well explored NVM's feature of ultra-low leakage and high density at various memory hierarchy. Furthermore, challenges such as asymmetric read/write, expensive write operation, and limited lifetime have also been tackled. However, the benefit from NVM's nonvolatility has never been fully exploited. This paper points out the potential benefit by leveraging nonvolatility for architecture design. Two case studies are described. The first one is to leveraging multi-level cell (MLC) STT-RAM for ultra-low overhead local checkpointing. The second one is persistent memory design, which support persistency in NVM based main memory. Potential benefit and design challenge for those two cases are described. Future research topic around exploring NVM's nonvolatility is also discussed.